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AMD Alchemy Solutions Processors
SDA2
SDA3
SDA4
SDA5
SDA6
SDA7
SDA8
SDA9
SDA10
SDA11
SDA12
RESETOUT#
LCLK
PCI_CLKO
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Lo
Out,Hi
Out,Lo
Out,Lo
//
//
//
//
//
//
//
//
//
//
//
// Buffered Output of CPU Reset Input
// LCD Controller Chip Interface Clock
// PCI clock output
// The following pins are input only.
// Setting to output of one of these pins results in an error.
// Declaration of the direction of these pins is optional.
U0RXD Inp // UART0 receive
U3RXD Inp // UART3 receive
PCI_LOCK# Inp // PCI lock fopr atomic operations
PCI_CLK Inp // PCI input clock
PCI_REQ0# Inp // PCI arbiter bus request input
PCI_REQ1# Inp // PCI arbiter bus request input
PCI_REQ2# Inp // PCI arbiter bus request input
PCI_REQ3# Inp // PCI arbiter bus request input
PCI_CFG Inp // PCI configuration, 0->sattelite mode, 1->host mode
PCI_IDSEL Inp // PCI initialization device select input
PCI_INTA# Inp // PCI interrupt input
PCI_INTB# Inp // PCI interrupt input
PCI_INTC# Inp // PCI interrupt input
PCI_INTD# Inp // PCI interrupt input
PCI_RST# Inp // PCI reset input
ACDI Inp // AC-Link TDM input stream
ACBCLK Inp // AC-Link serial data clock
N0CRS Inp //
N0RXD0 Inp //
N0RXD1 Inp //
N0RXD2 Inp //
JTAG_alchemyb.doc
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